added floats, negative numbers

This commit is contained in:
afonya 2025-06-16 18:51:34 +02:00
parent 8aee85680a
commit cef2217c9e
Signed by: afonya
GPG key ID: EBB9C4CAFAAFB2DC
7 changed files with 79 additions and 82 deletions

View file

@ -7,7 +7,7 @@ const ASXVERSION: [u8; 3] = [0,1,0];
pub struct Operation {
pub opcode: u8,
pub arg1: Option<u8>,
pub arg2: Option<i64>,
pub arg2: Option<f64>,
pub arg3: Option<u8>,
pub pos: u32,
}
@ -179,7 +179,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: str.pos as u32 });
}
ops.push(Operation { opcode: 1, arg1: Some(reg.register), arg2: Some(str_id as i64), arg3: None, pos: str.pos as u32 });
ops.push(Operation { opcode: 1, arg1: Some(reg.register), arg2: Some(str_id as f64), arg3: None, pos: str.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -188,7 +188,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: bool.pos as u32 });
}
ops.push(Operation { opcode: 4, arg1: Some(reg.register), arg2: Some(bool.value as i64), arg3: None, pos: bool.pos as u32 });
ops.push(Operation { opcode: 4, arg1: Some(reg.register), arg2: Some((bool.value as i64) as f64), arg3: None, pos: bool.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -197,7 +197,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: nul.pos as u32 });
}
ops.push(Operation { opcode: 6, arg1: Some(reg.register), arg2: Some(0), arg3: None, pos: nul.pos as u32 });
ops.push(Operation { opcode: 6, arg1: Some(reg.register), arg2: Some(0 as f64), arg3: None, pos: nul.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -210,8 +210,8 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
let str_id = *next_string_id;
strings.insert(str_id, var_read.variable.clone());
*next_string_id += 1;
ops.push(Operation { opcode: 1, arg1: Some(reg.register), arg2: Some(str_id as i64), arg3: None, pos: var_read.pos as u32 });
ops.push(Operation { opcode: 30, arg1: Some(0), arg2: Some(reg.register as i64), arg3: Some(reg.register), pos: var_read.pos as u32 });
ops.push(Operation { opcode: 1, arg1: Some(reg.register), arg2: Some(str_id as f64), arg3: None, pos: var_read.pos as u32 });
ops.push(Operation { opcode: 30, arg1: Some(0), arg2: Some(reg.register as f64), arg3: Some(reg.register), pos: var_read.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
}
@ -221,7 +221,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: var_read.pos as u32 });
}
ops.push(Operation { opcode: 2, arg1: Some(reg.register), arg2: Some(get_variable_by_name(variables, &var_read.variable, ops.len(), traceback).expect("Variable should exist").id as i64), arg3: None, pos: var_read.pos as u32 });
ops.push(Operation { opcode: 2, arg1: Some(reg.register), arg2: Some(get_variable_by_name(variables, &var_read.variable, ops.len(), traceback).expect("Variable should exist").id as f64), arg3: None, pos: var_read.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: get_variable_by_name(variables, &var_read.variable, ops.len(), traceback).expect("Variable should exist").id, last_used: *op_count });
return reg.register;
} else {
@ -240,7 +240,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: func.pos as u32 });
}
ops.push(Operation { opcode: 5, arg1: Some(reg.register), arg2: Some(func_id as i64), arg3: None, pos: func.pos as u32 });
ops.push(Operation { opcode: 5, arg1: Some(reg.register), arg2: Some(func_id as f64), arg3: None, pos: func.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -258,20 +258,20 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if ret_reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(ret_reg.register), arg2: None, arg3: None, pos: call.pos as u32 });
}
ops.push(Operation { opcode: 27, arg1: Some(func), arg2: Some(ret_reg.register as i64), arg3: None, pos: call.pos as u32 });
ops.push(Operation { opcode: 27, arg1: Some(func), arg2: Some(ret_reg.register as f64), arg3: None, pos: call.pos as u32 });
set_register(registers, RegisterState { id: ret_reg.register, used: true, variable: 0, last_used: *op_count });
return ret_reg.register;
},
ASTPart::If(if_part) => {
let condition_reg = do_ast_op(*if_part.condition, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None, pos: if_part.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as f64), arg3: None, pos: if_part.pos as u32 });
//Update the lastif variable
if get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).is_none() {
variables.push(Variable { name: String::from("__LASTIF"), id: *next_var_id, start: ops.len(), end: 0, no_end: true });
*next_var_id += 1;
}
ops.push(Operation { opcode: 7, arg1: Some(condition_reg), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as i64), arg3: None, pos: if_part.pos as u32 });
ops.push(Operation { opcode: 7, arg1: Some(condition_reg), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as f64), arg3: None, pos: if_part.pos as u32 });
set_register(registers, RegisterState { id: condition_reg, used: true, variable: get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id, last_used: *op_count });
let op_placeholder = ops.len();
@ -286,7 +286,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops[op_placeholder] = Operation {
opcode: 26,
arg1: Some(condition_reg),
arg2: Some(ops.len() as i64),
arg2: Some(ops.len() as f64),
arg3: None,
pos: if_part.pos as u32,
};
@ -311,13 +311,13 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: else_part.pos as u32 });
}
ops.push(Operation { opcode: 2, arg1: Some(reg.register), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as i64), arg3: None, pos: else_part.pos as u32 });
ops.push(Operation { opcode: 2, arg1: Some(reg.register), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as f64), arg3: None, pos: else_part.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id, last_used: *op_count });
else_condition_reg = reg.register;
} else {
else_condition_reg = reg.id;
}
ops.push(Operation { opcode: 24, arg1: Some(else_condition_reg), arg2: Some(else_condition_reg as i64), arg3: None, pos: else_part.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(else_condition_reg), arg2: Some(else_condition_reg as f64), arg3: None, pos: else_part.pos as u32 });
let op_placeholder = ops.len();
ops.push(Operation { opcode: 0, arg1: None, arg2: None, arg3: None, pos: else_part.pos as u32 });
@ -331,7 +331,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops[op_placeholder] = Operation {
opcode: 26,
arg1: Some(else_condition_reg),
arg2: Some(ops.len() as i64),
arg2: Some(ops.len() as f64),
arg3: None,
pos: else_part.pos as u32,
};
@ -355,20 +355,20 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: elseif_part.pos as u32 });
}
ops.push(Operation { opcode: 2, arg1: Some(reg.register), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as i64), arg3: None, pos: elseif_part.pos as u32 });
ops.push(Operation { opcode: 2, arg1: Some(reg.register), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as f64), arg3: None, pos: elseif_part.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id, last_used: *op_count });
else_condition_reg = reg.register;
} else {
else_condition_reg = reg.id;
}
ops.push(Operation { opcode: 24, arg1: Some(else_condition_reg), arg2: Some(else_condition_reg as i64), arg3: None, pos: elseif_part.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(else_condition_reg), arg2: Some(else_condition_reg as f64), arg3: None, pos: elseif_part.pos as u32 });
let condition_reg = do_ast_op(*elseif_part.condition, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 16, arg1: Some(else_condition_reg), arg2: Some(condition_reg as i64), arg3: Some(condition_reg), pos: elseif_part.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None, pos: elseif_part.pos as u32 });
ops.push(Operation { opcode: 16, arg1: Some(else_condition_reg), arg2: Some(condition_reg as f64), arg3: Some(condition_reg), pos: elseif_part.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as f64), arg3: None, pos: elseif_part.pos as u32 });
//Update the lastif variable
ops.push(Operation { opcode: 7, arg1: Some(condition_reg), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as i64), arg3: None, pos: elseif_part.pos as u32 });
ops.push(Operation { opcode: 7, arg1: Some(condition_reg), arg2: Some(get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id as f64), arg3: None, pos: elseif_part.pos as u32 });
set_register(registers, RegisterState { id: condition_reg, used: true, variable: get_variable_by_name(variables, "__LASTIF", ops.len(), traceback).expect("__LASTIF should exist").id, last_used: *op_count });
let op_placeholder = ops.len();
@ -383,7 +383,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops[op_placeholder] = Operation {
opcode: 26,
arg1: Some(condition_reg),
arg2: Some(ops.len() as i64),
arg2: Some(ops.len() as f64),
arg3: None,
pos: elseif_part.pos as u32
};
@ -397,7 +397,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ASTPart::While(while_part) => {
let start = ops.len();
let condition_reg = do_ast_op(*while_part.condition, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None, pos: while_part.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as f64), arg3: None, pos: while_part.pos as u32 });
let op_placeholder = ops.len();
let mut breaks: Vec<usize> = vec![];
@ -418,11 +418,11 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
}
}
}
ops.push(Operation { opcode: 25, arg1: None, arg2: Some(start as i64), arg3: None, pos: while_part.pos as u32 });
ops.push(Operation { opcode: 25, arg1: None, arg2: Some(start as f64), arg3: None, pos: while_part.pos as u32 });
ops[op_placeholder] = Operation {
opcode: 26,
arg1: Some(condition_reg),
arg2: Some(ops.len() as i64),
arg2: Some(ops.len() as f64),
arg3: None,
pos: while_part.pos as u32
};
@ -430,7 +430,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops[brk] = Operation {
opcode: 25,
arg1: None,
arg2: Some(ops.len() as i64),
arg2: Some(ops.len() as f64),
arg3: None,
pos: while_part.pos as u32
};
@ -439,7 +439,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops[cont] = Operation {
opcode: 25,
arg1: None,
arg2: Some(start as i64),
arg2: Some(start as f64),
arg3: None,
pos: while_part.pos as u32
};
@ -459,7 +459,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
do_ast_op(*for_part.init, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
let start = ops.len();
let condition_reg = do_ast_op(*for_part.condition, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None, pos: for_part.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as f64), arg3: None, pos: for_part.pos as u32 });
let op_placeholder = ops.len();
let mut breaks: Vec<usize> = vec![];
@ -482,11 +482,11 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
}
do_ast_op(*for_part.update, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 25, arg1: None, arg2: Some(start as i64), arg3: None, pos: for_part.pos as u32 });
ops.push(Operation { opcode: 25, arg1: None, arg2: Some(start as f64), arg3: None, pos: for_part.pos as u32 });
ops[op_placeholder] = Operation {
opcode: 26,
arg1: Some(condition_reg),
arg2: Some(ops.len() as i64),
arg2: Some(ops.len() as f64),
arg3: None,
pos: for_part.pos as u32
};
@ -494,7 +494,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops[brk] = Operation {
opcode: 25,
arg1: None,
arg2: Some(ops.len() as i64),
arg2: Some(ops.len() as f64),
arg3: None,
pos: for_part.pos as u32
};
@ -503,7 +503,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops[cont] = Operation {
opcode: 25,
arg1: None,
arg2: Some(start as i64),
arg2: Some(start as f64),
arg3: None,
pos: for_part.pos as u32
};
@ -536,7 +536,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
"<" => 22,
"<=" => 23,
"!" => {
ops.push(Operation { opcode: 24, arg1: Some(left_reg), arg2: Some(reg.register as i64), arg3: None, pos: op.pos as u32 });
ops.push(Operation { opcode: 24, arg1: Some(left_reg), arg2: Some(reg.register as f64), arg3: None, pos: op.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -546,7 +546,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
process::exit(1);
},
};
ops.push(Operation { opcode, arg1: Some(left_reg), arg2: Some(right_reg as i64), arg3: Some(reg.register), pos: op.pos as u32 });
ops.push(Operation { opcode, arg1: Some(left_reg), arg2: Some(right_reg as f64), arg3: Some(reg.register), pos: op.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -562,7 +562,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops.push(Operation { opcode: 8, arg1: Some(reg.id), arg2: None, arg3: None, pos: upd.pos as u32 });
set_register(registers, RegisterState { id: reg.id, used: false, variable: 0, last_used: 0 });
}
ops.push(Operation { opcode: 7, arg1: Some(value_reg), arg2: Some(get_variable_by_name(variables, &upd.variable, ops.len(), traceback).expect("Variable should exist").id as i64), arg3: None, pos: upd.pos as u32 });
ops.push(Operation { opcode: 7, arg1: Some(value_reg), arg2: Some(get_variable_by_name(variables, &upd.variable, ops.len(), traceback).expect("Variable should exist").id as f64), arg3: None, pos: upd.pos as u32 });
set_register(registers, RegisterState { id: value_reg, used: true, variable: get_variable_by_name(variables, &upd.variable, ops.len(), traceback).expect("Variable should exist").id, last_used: *op_count });
garbage_collect_registers(registers);
},
@ -575,7 +575,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
let reg = do_ast_op(*asign.value, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
variables.push(Variable { name: asign.variable.clone(), id: *next_var_id, start: ops.len(), end: 0, no_end: true });
*next_var_id += 1;
ops.push(Operation { opcode: 7, arg1: Some(reg), arg2: Some(get_variable_by_name(variables, &asign.variable, ops.len(), traceback).expect("Variable should exist").id as i64), arg3: None, pos: asign.pos as u32 });
ops.push(Operation { opcode: 7, arg1: Some(reg), arg2: Some(get_variable_by_name(variables, &asign.variable, ops.len(), traceback).expect("Variable should exist").id as f64), arg3: None, pos: asign.pos as u32 });
set_register(registers, RegisterState { id: reg, used: true, variable: get_variable_by_name(variables, &asign.variable, ops.len(), traceback).expect("Variable should exist").id, last_used: *op_count });
garbage_collect_registers(registers);
},
@ -584,12 +584,12 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: tbl.pos as u32 });
}
ops.push(Operation { opcode: 6, arg1: Some(reg.register), arg2: Some(1), arg3: None, pos: tbl.pos as u32 });
ops.push(Operation { opcode: 6, arg1: Some(reg.register), arg2: Some(1 as f64), arg3: None, pos: tbl.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
for val in tbl.values {
let key_reg = do_ast_op(val.key, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
let value_reg = do_ast_op(val.value, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 31, arg1: Some(reg.register), arg2: Some(key_reg as i64), arg3: Some(value_reg), pos: tbl.pos as u32 });
ops.push(Operation { opcode: 31, arg1: Some(reg.register), arg2: Some(key_reg as f64), arg3: Some(value_reg), pos: tbl.pos as u32 });
}
return reg.register;
},
@ -600,7 +600,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: tbl_get.pos as u32 });
}
ops.push(Operation { opcode: 30, arg1: Some(table_reg), arg2: Some(key_reg as i64), arg3: Some(reg.register), pos: tbl_get.pos as u32 });
ops.push(Operation { opcode: 30, arg1: Some(table_reg), arg2: Some(key_reg as f64), arg3: Some(reg.register), pos: tbl_get.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -608,7 +608,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
let table_reg = do_ast_op(*tbl_set.table, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
let key_reg = do_ast_op(*tbl_set.key, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
let value_reg = do_ast_op(*tbl_set.value, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 31, arg1: Some(table_reg), arg2: Some(key_reg as i64), arg3: Some(value_reg), pos: tbl_set.pos as u32 });
ops.push(Operation { opcode: 31, arg1: Some(table_reg), arg2: Some(key_reg as f64), arg3: Some(value_reg), pos: tbl_set.pos as u32 });
},
ASTPart::Import(impr) => {
let fi = fs::read_to_string(&impr.path);
@ -633,8 +633,8 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
if reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(reg.register), arg2: None, arg3: None, pos: impr.pos as u32 });
}
ops.push(Operation { opcode: 5, arg1: Some(reg.register), arg2: Some((*next_function_id-1) as i64), arg3: None, pos: impr.pos as u32 });
ops.push(Operation { opcode: 27, arg1: Some(reg.register), arg2: Some(reg.register as i64), arg3: None, pos: impr.pos as u32 });
ops.push(Operation { opcode: 5, arg1: Some(reg.register), arg2: Some((*next_function_id-1) as f64), arg3: None, pos: impr.pos as u32 });
ops.push(Operation { opcode: 27, arg1: Some(reg.register), arg2: Some(reg.register as f64), arg3: None, pos: impr.pos as u32 });
set_register(registers, RegisterState { id: reg.register, used: true, variable: 0, last_used: *op_count });
return reg.register;
},
@ -783,7 +783,7 @@ fn compile_body(compiled: Compiled, fpos: &mut usize, ctx: &Context) -> (Vec<u8>
op_bin.push_str(&num_to_bin(0, 4));
}
if let Some(arg2) = ops.arg2 {
op_bin.push_str(&num_to_bin(arg2 as usize, 64));
op_bin.push_str(&num_to_bin(arg2.to_bits() as usize, 64));
} else {
op_bin.push_str(&num_to_bin(0, 64));
}