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added even more opeartions to the VM

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This commit is contained in:
afonya2 2025-06-01 16:56:07 +02:00
parent 7c2c29fb1a
commit c901731119
Signed by: afonya
GPG key ID: EBB9C4CAFAAFB2DC
2 changed files with 81 additions and 6 deletions
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4
src/compiler.rs
View file

@ -200,7 +200,6 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
},
ASTPart::If(if_part) => {
let condition_reg = do_ast_op(*if_part.condition, op_count, ops, var_ids, next_var_id, strings, next_string_id, functions, next_function_id, registers);
ops.push(Operation { opcode: 30, arg1: Some(condition_reg), arg2: Some(2), arg3: None });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None });
//Update the lastif variable
@ -281,7 +280,6 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ops.push(Operation { opcode: 24, arg1: Some(else_condition_reg), arg2: Some(else_condition_reg as i64), arg3: None });
let condition_reg = do_ast_op(*elseif_part.condition, op_count, ops, var_ids, next_var_id, strings, next_string_id, functions, next_function_id, registers);
ops.push(Operation { opcode: 30, arg1: Some(condition_reg), arg2: Some(2), arg3: None });
ops.push(Operation { opcode: 16, arg1: Some(else_condition_reg), arg2: Some(condition_reg as i64), arg3: Some(condition_reg) });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None });
@ -314,7 +312,6 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
ASTPart::While(while_part) => {
let start = ops.len();
let condition_reg = do_ast_op(*while_part.condition, op_count, ops, var_ids, next_var_id, strings, next_string_id, functions, next_function_id, registers);
ops.push(Operation { opcode: 30, arg1: Some(condition_reg), arg2: Some(2), arg3: None });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None });
let op_placeholder = ops.len();
@ -370,7 +367,6 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
do_ast_op(*for_part.init, op_count, ops, var_ids, next_var_id, strings, next_string_id, functions, next_function_id, registers);
let start = ops.len();
let condition_reg = do_ast_op(*for_part.condition, op_count, ops, var_ids, next_var_id, strings, next_string_id, functions, next_function_id, registers);
ops.push(Operation { opcode: 30, arg1: Some(condition_reg), arg2: Some(2), arg3: None });
ops.push(Operation { opcode: 24, arg1: Some(condition_reg), arg2: Some(condition_reg as i64), arg3: None });
let op_placeholder = ops.len();

83
src/virtualmachine.rs
View file

@ -519,12 +519,91 @@ impl Machine {
10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 => {
do_operation_operation(&mut self.registers, &mut self.memory, operation);
},
24 => {
//NOT
let reg1 = get_register_by_id(&self.registers, operation.arg1);
let reg2 = get_register_by_id(&self.registers, operation.arg2 as u8);
let mem1 = get_mem_pos_by_var_id(&self.memory, reg1.unwrap().pointer as u32);
let mut mem2 = get_mem_pos_by_var_id(&self.memory, reg2.unwrap().pointer as u32);
if mem1.is_none() {
panic!("Memory location not found for register");
}
if mem2.is_none() {
self.memory.push(VMMemory::Boolean(VMMemoryBoolean { value: false, variable_id: 0 }));
set_register(&mut self.registers, Register { id: operation.arg3, pointer: self.memory.len() - 1 });
mem2 = Some(self.memory.len() - 1);
}
let mem1 = mem1.unwrap();
let mem2 = mem2.unwrap();
let temp_mem = self.memory.clone();
match (&temp_mem[mem1], &mut self.memory[mem2]) {
(VMMemory::Boolean(bool1), VMMemory::Boolean(bool2)) => {
bool2.value = !bool1.value;
},
_ => panic!("Invalid memory types for NOT operation"),
}
},
25 => {
//JMP
self.pc = operation.arg2 as usize;
},
26 => {
//CJP
let reg = get_register_by_id(&self.registers, operation.arg1);
if reg.is_none() {
panic!("Register {} not found", operation.arg1);
}
let reg = reg.unwrap();
let mem = get_mem_pos_by_var_id(&self.memory, reg.pointer as u32);
if mem.is_none() {
panic!("Memory location not found for register");
}
let mem = mem.unwrap();
match &self.memory[mem] {
VMMemory::Boolean(bool) => {
if bool.value {
self.pc = operation.arg2 as usize;
}
}
_ => panic!("Invalid memory type for CJP operation"),
}
},
27 => {
//CAL
//not implemented yet
},
28 => {
//PSH
let reg = get_register_by_id(&self.registers, operation.arg1);
if reg.is_none() {
panic!("Register {} not found", operation.arg1);
}
let reg = reg.unwrap();
let mem = get_mem_pos_by_var_id(&self.memory, reg.pointer as u32);
if mem.is_none() {
panic!("Memory location not found for register");
}
let mem = mem.unwrap();
self.stack.push(self.memory[mem].clone());
},
29 => {
//RET
//not implemented yet
},
_ => panic!("Unknown opcode: {}", main_func.body[self.pc].opcode),
30 => {
//not implemented yet
},
31 => {
//GET
//not implemented yet
},
32 => {
//SET
//not implemented yet
},
_ => {
panic!("Unknown operation code: {}", operation.opcode);
}
}
}
}