fixed the register allocation issue

This commit is contained in:
afonya 2025-06-18 11:30:44 +02:00
parent b35f52d02e
commit 00207f544a
Signed by: afonya
GPG key ID: EBB9C4CAFAAFB2DC

View file

@ -103,6 +103,7 @@ fn allocate_register(registers: &Vec<RegisterState>) -> AllocateResult {
let mut oldest_register: u8 = 0;
let mut oldest_temp: usize = 0;
let mut oldest_temp_register: u8 = 0;
let mut tempc = 0;
for register in registers {
if ((register.last_used < oldest) || (oldest == 0)) && register.id != 0 {
oldest = register.last_used;
@ -112,13 +113,16 @@ fn allocate_register(registers: &Vec<RegisterState>) -> AllocateResult {
oldest_temp = register.last_used;
oldest_temp_register = register.id;
}
if register.id != 0 && register.variable == 0 {
tempc += 1;
}
}
/*if oldest_temp_register != 0 {
if oldest_temp_register != 0 && tempc > 3 {
return AllocateResult {
register: oldest_temp_register,
unbind_before: false,
};
}*/
}
return AllocateResult {
register: oldest_register,
unbind_before: true,
@ -245,7 +249,6 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
return reg.register;
},
ASTPart::Call(call) => {
let func = do_ast_op(*call.function, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
for arg in call.args {
let arg_reg = do_ast_op(arg, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
ops.push(Operation { opcode: 28, arg1: Some(arg_reg), arg2: None, arg3: None, pos: call.pos as u32 });
@ -254,6 +257,7 @@ fn do_ast_op(ast_op: ASTPart, op_count: &mut usize, ops: &mut Vec<Operation>, va
set_register(registers, RegisterState { id: arg_reg, used: false, variable: 0, last_used: 0 });
}
}
let func = do_ast_op(*call.function, op_count, ops, variables, next_var_id, strings, next_string_id, functions, next_function_id, registers, ctx, traceback);
let ret_reg = allocate_register(registers);
if ret_reg.unbind_before {
ops.push(Operation { opcode: 8, arg1: Some(ret_reg.register), arg2: None, arg3: None, pos: call.pos as u32 });